This image was taken from a handbook about TTL Logic devices.

Edit and compile if you like:
% Block Diagram for TTL IC Multiplexer 74HC153% Author: Ramón Jaramillo.\documentclass[tikz,border=10pt,12pt,x11names]{standalone}\usepackage{tikz}\usetikzlibrary{circuits.logic.US} % TiKZ Library for US Logic Circuits.\begin{document}\begin{tikzpicture}[circuit logic US, every circuit symbol/.style={thick}]% Logic Gates in Left Side of Multiplexor\node[buffer gate, point down,inputs={i}] (buf1) at (-1,3) {}; % Input Ea\node[and gate,inputs={nnnn}, point down] (and1) at (0,-1) {};\node[and gate,inputs={nnnn}, point down] (and2) at (1.5,-1) {};\node[and gate,inputs={nnnn}, point down] (and3) at (3,-1) {};\node[and gate,inputs={nnnn}, point down] (and4) at (4.5,-1) {};\node[or gate,inputs={nnnn}, point down] (or1) at (2.25,-3) {};\node[not gate, point down] (not1) at (5.5,4) {}; % Input Sa\node[buffer gate, point down,inputs={i}] (buf2) at (5.5,2.5) {};% Left Side connections\draw [red, very thick] (buf1.output) -- ++(down:26.4mm) -| (and1.input 4);\draw (and1.output) -- ++(down:5mm) -| (or1.input 4);\draw (and2.output) -- ++(down:3mm) -| (or1.input 3);\draw (and3.output) -- ++(down:3mm) -| (or1.input 2);\draw (and4.output) -- ++(down:5mm) -| (or1.input 1);\draw (not1.output) -- (buf2.input);% Logic Gates in Right Side of Multiplexor\node[not gate, point down] (not2) at (7,4) {}; % Input Sb\node[buffer gate, point down,inputs={i}] (buf3) at (7,2.5) {};\node[buffer gate, point down,inputs={i}] (buf4) at (13.50,3) {}; % Input Eb\node[and gate,inputs={nnnn}, point down] (and5) at (8,-1) {};\node[and gate,inputs={nnnn}, point down] (and6) at (9.5,-1) {};\node[and gate,inputs={nnnn}, point down] (and7) at (11,-1) {};\node[and gate,inputs={nnnn}, point down] (and8) at (12.5,-1) {};\node[or gate,inputs={nnnn}, point down] (or2) at (10.25,-3) {};\draw (not2.output) -- (buf3.input);% Right Side connections\draw [red, very thick] (buf4.output) -- ++(down:26.4mm) -| (and8.input 1);\draw (and5.output) -- ++(down:5mm) -| (or2.input 4);\draw (and6.output) -- ++(down:3mm) -| (or2.input 3);\draw (and7.output) -- ++(down:3mm) -| (or2.input 2);\draw (and8.output) -- ++(down:5mm) -| (or2.input 1);% Inputs and Outputs of Multiplexer\draw [black,very thick] (buf1.input) -- ++(up:5mm) node [above]{$E_a$};
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